The present invention relates to a switching power supply circuit destined to function in a discontinuous mode, i.e. with a momentary nullification of the current through a "fly-back" inductance between successive impulses. More particularly the invention relates to an improved system for controlling the switching-on of a power device whereby besides reducing power consumption, a higher reliability and immunity to noise of the circuit are also achieved.
A switching power supply, commonly based on a so-called boost-type circuit utilizing a fly-back inductance, provides an output DC voltage having a value greater than the value of the input voltage, i.e. of the value of the rectified line voltage. During each switching cycle, such a "fly-back" inductance alternately absorbs energy from the "low" voltage side (i.e. through the terminal connected to the rectified line voltage) during a conducting phase of the power device (transistor), and thereafter, following the switching-off of the power transistor (i.e. conduction taking place through an output diode), it gives back the energy stored in the inductance at the output voltage, releasing it to an application circuit connected thereto (i.e. whatever circuit or subsystem uses the generated voltage Vout). If for any reason the output voltage becomes lower than the rectified line voltage, the circuit operates under anomalous conditions which, under certain circumstances, may lead to failure.
Commonly these systems function according to one of two alternative modes of operation in relation to the variation of the current which circulates in the fly-back inductance during each switching cycle is concerned.
According to a first technique ("continuous" or "hysteretic" mode), the current across the inductance is made to vary between two limit values of the same sign, different from each other by not more than about ten or more percentage points, as referred to the amplitude of the rectified waveform. This first technique is preferred for high-power systems, because, for a given power, the introduction of electromagnetic interference in the line may be contained by employing a relatively inexpensive filter circuit, though requiring a more sophisticated switching circuit. In practice the current flowing through the inductance has a high frequency saw-tooth waveform having a relatively small amplitude (ripple).
By contrast, an alternative technique ("discontinuous" mode) is widely employed in power supplies of relatively low power, typically up to one or two hundred watts. The current that circulates in the fly-back inductance is made to vary, during each switching cycle, between zero and a maximum value which follows the envelope of the rectified waveform.
The cost of the relative switching circuit is less than in the preceding case, while the cost of the circuit necessary for filtering the disturbances which would otherwise be introduced into the network remains economically tolerable because of the relatively low current and power levels. A simplified diagram of a power supply of this latter type is shown in FIG. 1.
In the case of this second technique it is possible to optimize the conversion efficiency by exploiting the fact that the power device Pw may be switched-on when the current through the fly-back inductance L is null.
In practice the amount of energy that would be lost in the switching power transistor Pw when, upon switching-on, it must dissipate the energy stored in the parasitic capacitance Cp that exists between the circuit node connected to the drain (collector) terminal and ground, may be significantly reduced. In the case of the first technique (continuous mode) the drain voltage before the switching-on of the power transistor is equal to the output voltage and because the drain is forced by the switching-on process to ground potential, for each cycle an energy equal to: 1/2CpV.sub.out.sup.2, where V.sub.out is the output voltage is dissipated through a discharge of the parasitic capacitance Cp. However, in the case of the second technique (discontinuous mode), it is possible to reduce this power dissipation. This is often obtained by slightly delaying the switching-on of the power transistor. Instead of switching-on the power transistor as soon as the current flowing through the fly-back inductance toward the output circuit Co through the diode Dr has become null, a certain progress of a resonance process of the inductance L with the parasitic capacitance Cp is available. Therefore, the parasitic capacitance Cp discharges in a nondissipative mode from the output voltage level V.sub.out to the input voltage level V.sub.in, which is significantly lower than V.sub.out.
When the power transistor Pw finally switches-on again it must dissipate an energy equal to: 1/2CpV.sub.out.sup.2, which is less than that of the case described before, by a proportion given by: V.sub.in.sup.2 /V.sub.out.sup.2.
Therefore, a switch-on signal is commonly obtained by detecting, on a dedicated secondary winding Ls magnetically coupled to the fly-back inductance L, a condition of null voltage across the secondary winding Ls.
A switch-off signal for the power device (transistor) is normally obtained through a comparison between a reference signal (which may e.g. be purposely generated within a PWM driving circuit), and the current which flows through the power device Pw, which is commonly read on a sensing resistance (Rsense) connected in series with the power transistor Pw. When the sensed current reaches a reference threshold, the power transistor is turned-off.
That is, the rectified line voltage V.sub.in is substantially present on the node C, while on the other terminal of the fly-back inductance L, i.e. on the D node, a square wave voltage is present that takes a substantially null value when the power transistor Pw is conducting, and a V.sub.out value (i.e. the output voltage of the power supply) when the power transistor Pw is not conducting. Therefore, the voltage signal that is induced on the secondary winding Ls, i.e. the voltage present on the node A, has a waveform that is enveloped at the top and at the bottom by a sinusold, as depicted in FIG. 2a. This voltage signal, through the resistance R1, is fed to a clipping circuit composed of the transistor Q1, the bias current generator Ib, the pair of series connected diodes D1 and D2, and the Zener diode DZ1, as shown in FIG. 1. This circuit limits the amplitude of a signal that is a replica of the voltage induced on the secondary winding Ls, on the node B (i.e. output node of the clipping circuit), as represented in FIG. 2b. This limited (clipped) voltage signal is compared with a reference voltage (schematically indicated in FIG. 1 by a battery symbol) by the comparator COMP, capable of producing a switch-on signal for the power device Pw that is sent to an input of a PWM driving circuit.
To help clarify this point, attention is drawn again to the circuit of FIG. 1 and to the signal waveforms shown in FIGS. 2a, 2b, 2c and 2d.
The minimum value of the sinusoid which envelopes at the top the signal representing the voltage present on the node A (i.e. the voltage induced on the secondary winding Ls) is given by: EQU Vmin=(V.sub.out -V.sub.in)/K,
where K is the L/Ls transformer ratio. When Vmin is lower than the upper threshold of the clipping circuit, the voltage on the node B will shows a "valley", as depicted in FIG. 2b, and this valley expands upon an increase of the V.sub.in value. When finally V.sub.in becomes greater than V.sub.out, Vmin becomes negative, thus determining a situation similar to the one depicted in FIG. 2c. As may be observed in the central zone of FIG. 2c, the valley may grow to completely nullify the signal, and, as a consequence, the output of the comparator COMP will remain high as depicted in FIG. 2d.
In these conditions, as depicted in the central zones of the FIGS. 2b, 2c, and 2d, it is easily recognized that any noise or spurious spike that may superimpose to the waveform of V.sub.in, may simulate spurious transitions of the represented signal. In fact, it is the positive or negative transitions, as referred to the sense of the magnetic coupling of the secondary winding Ls with the fly-back (primary) winding L, that identify the instant when the voltage across the fly-back inductance drops from V.sub.out -V.sub.in to zero, and which accordingly are utilized for generating a switch-on signal for the power transistor Pw.
Thus, it may be seen that these prior art circuits have a drawback that is represented by the fact that it is possible that a spurious disturbance in the rectified line voltage (input voltage), by transferring itself to the secondary winding Ls, may simulate a transition and therefore cause the switching-on of the power transistor Pw before the current through the fly-back inductance L has effectively dropped to zero.
This risk is particularly present in some particular types of circuits, such as in switching power supplies with a PWM control circuit and where a control upon the power factor is also implemented. (Electronic power factor correction is an area of increasing demand for technological solutions. See, e.g., Neufeld, "Control IC for Near Unity Power Factor in SMPS," POWER CONVERSION (OCTOBER 1989 PROCEEDINGS) pp. 110ff, which is hereby incorporated by reference. Additional materials are included in the appendix to the present application, which is hereby incorporated by reference.) In these circuits the input voltage V.sub.in is:
relatively unfiltered after rectification (due to the need for not reactively loading the line); and PA1 variable from zero (which makes particularly effective the technique of delaying the switching-on of the power transistor described above) up to a maximum value that is close to the value of the output voltage (which on the other hand makes a spurious switching-on of the power transistor extremely dangerous) for each half-cycle of the line frequency. PA1 the input voltage becomes nearly equal to the output voltage (FIG. 2b), or, in case of an r.m.s. value and/or form factor greater than the design maxima, becomes greater than the output voltage (FIG. 2d); and PA1 during each switching cycle more factors of risk combine together:
A particularly critical situation occurs when the rectified line sinusoid reaches its maximum. In the neighborhood of these maxima:
the duration of the conduction period of the power transistor Pw shortens and that of nonconduction lengthens, thus increasing the proportion of a cycle when the occurrence of a spurious switching-on may be possible; PA2 the current at which the switching-off occurs is relatively high and a spurious switching-on may occur while the fly-back inductance L still stores a relatively high energy; PA2 the voltage across the fly-back inductance L during the "fly-back" period (power transistor off) is at minimum value and a disturbance may easily induce a spurious sensing of a transition.
Notably in these systems, the current flowing in the fly-back inductance has a substantially triangular wave shape (in practice the shape of a nonisosceles triangle of variable aspect), the amplitude of which varies from zero to a maximum that is enveloped by the rectified half-wave of the line voltage (V.sub.in). During the rising portion of this waveform, the current flows through the power transistor Pw; during the falling portion the current flows through the output diode to the application circuit. In these cases, it is important to prevent the transistor Pw from being erroneously switched-on again when the current which flows through the fly-back inductance (and the output diode Dr and the application circuit) is at a relatively high level.
It is therefore a main objective of the present invention to provide an improved control circuit for the switching-on of the power element of a boost-type circuit, free of the drawbacks of the known circuits, thus making a switching power supply more immune to disturbances and therefore more reliable in its operation.
These objectives and advantages are obtained, in the control system provided by the innovative teachings disclosed herein, by monitoring through a sensing resistance that is purposely connected in series with the output circuit (i.e. with the application circuit and not with the power transistor, as was commonly the case in the circuits of the prior art), not the current which flows through the power transistor but the current which flows through the fly-back inductance.
The control system of the invention prevents the transfer of a switch-on signal, as generated by elaborating the signal present across a secondary winding magnetically, coupled with the winding (primary) of the fly-back inductance, to a Pulse-With-Modulation (PWM) driving circuit, as long as a current flowing through the fly-back inductance is detected. It should be noted that this does not alter the sensing of the optimum instant for switching-off the power transistor by the PWM driving circuit. In this way, not only the power dissipation associated with the discharge of the parasitic capacitance that is intrinsic to the structure of the power device (transistor), is reduced, but also the risks of an anticipated switching-on of the power transistor, which may be caused by noise or spurious events propagating on the line, are eliminated. Avoidance of such spurious activation results in (among other advantages) avoidance of efficiency loss.
The circuit provided by the disclosed invention is particularly useful when the line voltage has a relatively high form factor or presents noise spikes, as well as in all those instances when the output voltage, because of a certain variation of the load of the power supply, is subjected to a so-called "under-shoot" phenomenon, as related to the design regulated output voltage. The latter phenomenon is practically inevitable when the switching power supply is provided with means for implementing also a function of control on the power factor (PFC).